Spatial light modulators (SLMs) are devices that modulate incident light in a spatial pattern corresponding to an electrical or optical input. The incident light may be modulated in its phase, intensity, polarization, or direction. The light modulation may be achieved by a variety of materials exhibiting various electrooptic or magnetooptic effects, and by materials that modulate light by surface deformation. SLMs have found numerous applications in the areas of optical information processing, projection displays, and electrostatic printing. Reference is here by made to U.S. Pat. No. 5,061,049 to Hornbeck, entitled Spatial Light Modulator and Method; U.S. Pat. No. 5,079,544 to DeMond et al, entitled Standard Independent Digitized Video System; and U.S. Pat. No. 5,105,369 to Nelson, entitled "Printing System Exposure Module Alignment Method and Apparatus of Manufacture", each patent being assigned to the same assignee as the present invention, and the teachings of each are incorporated herein by reference.
The SLM may be binary in that each pixel element of an area or linear array may have a deflectable beam addressable to have either of two states. The pixel element may be "off", and deliver no light to a receiver. Conversely, the pixel element may be "on", and deliver light at a maximum intensity to the receiver. One such SLM is known as a digital micromirror device (DMD), with the deflectable beam mirror element. To achieve a viewer perception of intermediate levels of light, various pulse width modulation techniques can be used. One modulation technique is described in U.S. Pat. No. 5,278,652, entitled "DMD architecture and timing for use in a pulse-width modulated display system", assigned to the same assignee as the present invention, and the teachings of which are incorporated herein by reference.
One existing DMD pixel loading technique requires at least one memory cell per pixel element. As a number of pixels per frame increases, the memory requirements for such an SLM device results in increased cost and reduced manufacturing yields. Currently, linear arrays of 64.times.7056 pixels, and area arrays of 1000.times.2000 pixels are being developed. One improvement to this technique is to time-multiplex one memory cell to a plurality of pixels grouped as a set of pixels. This technique is also known as split-reset, wherein each pixel of the pixel group is individually reset (addressed) to selectively load data from an associated memory cell. In one embodiment, four pixels may be associated with a single memory cell, whereby the contents of this memory cell are used to selectively control the position of the pixels associated with that memory cell. Only one pixel may be controlled at a given time, thus lending to the technique known as split-reset control. For additional discussion on this technique, cross reference is hereby made to co-pending patent application Ser. No. 08/002,627 entitled "Pixel Control Circuitry for Spatial Light Modulator", assigned to the same assignee as the present application, and the teachings of which are incorporated herein by reference.
These mirrors in a DMD type array are densely arranged, and may have a width of approximately 17 microns. Thus, the associated address and control circuitry located under the pixel mirrors correspondingly has small dimensions as well. For instance, circuit etches provided in the semiconductor SLM may have etch widths in the range of one micron, and spacing from an adjacent etch of approximately one micron. Even with advanced semiconductor processing techniques, shorts between etches can occasionally occur.
While robust manufacturing techniques may be implemented which are known to achieve high yield semiconductor devices with a minimum number of defects, semiconductor devices also need to be designed to reduce the likelihood of defects, or withstand defects which can occur during the manufacturing process.